Programmed I/O
One of the three strategies we employ in I/O transfer is the programmed I/O. The two other techniques are I/O and DMA (direct memory access) interrupted. Programmed I/O is a technology or strategy used for the transmission of data from CPU to I/O module.
It is the processor’s job to monitor the I/O transfer to the main memory as input. Main memory to I / O as an output when we talk of planned I/O and interrupted I / O. In contrast, the DMA does not include a CPU, a primary memory and an I/O directly exchange its data.
In the next part, we will examine how programmed I/O is necessary and how it works.
What is the Need?
A scenario of human and computer interaction where the human type is something. On the keyboard considers the requirements and workings of the programmed I/O. This data must have stored in the memory and shown on the display device by the CPU.
This entire operation has controlled by a program using the programmed I/O. This operation has required at the correct time. When the typed characters have transferred from the keypad to the memory and subsequently to the display module.
Let us look more closely at this. When a user presses the keyboard, the input from the keyboard has acknowledged. And only when the module has ready to accept the output may have transmitted to the display module.
In this case, it relies on the computer type speed. When data has transported from a clavier into the computer’s memory. The speed at which output data has transmitted from the memory into the display module, on the other hand, is quite high.
When compared to the CPU speed, the rate at which the character may have sent and shown in the display module has even lent. So a method must have built to synchronize the data transmission between processors and I/O modules in order to overcome the difference in the speed of the processor or I/O device. This is what we need to program I/O.
Functioning of programmed I/O
Take into account the situation in which the processor runs any application. It meets an I/O command in the meanwhile. The procedure provides a suitable I/O command to the associated I/O module in order to perform the instruction. The I/O module does the required action, and sets some suitable bits of its I/O status registers, by accepting the provided instruction. The bus structure of each I/O interface contains a number of registers, as we have seen in our earlier content.
In addition, the I/O module does not inform the CPU that the requested job has done. In addition, it is the role of the processors to regularly verify the state of the I/O module until the I/O has done the intended duty successfully.
If the programmed I/O function has observed, two things have involved The I/O command which has supplied by the I/O module processor, and an I/O command which the processor encounters and executes. Let’s talk about both of these.
I/O Commands
In order to execute the I/O command, the CPU will execute two I/O commands and addresses on the bus that have decoded by each I/O module linked to that system, once it received the I/O command. Any I/O module the CPU addresses acknowledge that the address has the I/O command sent.
There may be four sorts of processor I/O directives for the I/O module.
Control: This I/O instruction activates the processor’s I/O module and sends it to the job that it needs to do. Depending on the type of peripherals, this command have adapted.
Test: This I/O command verifies the status and peripherals of the I/O module to verify the specified peripheral has motivated and available for the job. This command also examines if the latest I/O operation has been successful or if there are any errors.
Read: This I/O command allows the I/O module to retrieve information in its internal buffer from the appropriate peripheral. In addition, the I/O module can make the data on the processor’s request over the data bus.
Write: The I/O command enables an I/O module to accept and transfer data to the relevant peripheral through the data autobus.
I/O Instructions
The processor’s I/O instruction has transmitted through the main memory to the processor. The CPU delivers the I/O command for the relevant I/O device in order to perform this I/O instruction. This just maps the I/O instruction cab to the I/O command. Usually, the I/O instruction and the I/O command have a straightforward one-to-one connection.
Depending on the addressed peripherals, the I/O instruction can also have modified. How the external device or the peripheral realizes that the CPU addresses them and has given an I/O command has explained above.
So, when the processor, memory, and I/O module share a common Bus, memory-mapped I/O and isolated I/O addresses may have accomplished in two ways.
With the I/O, the CPU uses a single address space to access memory and I/O. The CPU utilizes the same address, data, and control bus in this case. Thus, both memory and I/O have addressed in the same set.
The memory address space has segregated from the I/O address space using isolated I/O. Although the CPU utilizes the same memory and I/O device data and addresses it requires a separate memory and I/O device control line.
In comparison to the isolated I/O, the Memory Mapped I/O has a wide range of I/O commands.
Therefore, a program to perform the job will has developed for the programmed I/O for each I/O transfer or I/O operation. The usage of interruption is part of the other two I/O methods, i.e. interrupted I/O and DMA.